A complete machine-learning system that predicts AI assistant user satisfaction using behavioral signals such as device, usage category, time features, session metrics, and model metadata. Includes full ML pipeline, SHAP explainability, evaluation suite, and an interactive Streamlit analytics dashboard.

This repository contains Verilog HDL implementations of Half Adders, Full Adders, and 4-bit Adders, designed at three different abstraction levels: Gate Level, Dataflow Level, and Behavioral Level. These designs are fundamental to digital electronics, and this project showcases the versatility of Verilog in modeling and simulating digital circuits.

An end-to-end customer segmentation and behavioral modeling project. This repository showcases the development of an RFM model from scratch using SQL to classify customers and empower targeted marketing strategies.

Комплексная система для генерации реалистичных траекторий перемещения людей в городской среде. Проект сочетает паттерны проектирования, пространственный анализ с OSMnx и статистическую валидацию против реальных данных

A sophisticated Python framework for modeling and simulating psychological personality systems. This project enables dynamic personality evolution through event simulation, allowing for realistic modeling of how life experiences shape personality traits and psychological attributes.

AI-powered social media simulation framework using LLMs for modeling Twitter dynamics during crisis events. Built for SBP-BRiMS 2024 Twitter Challenge.

Compilation of Verilog behavioral models and test benches for the four types of flip-flops (SR, JK, D, and T)

Vivado VHDL

Adaptive Kalman-EM algorithm for learning time-varying syntax rules in behavioral sequences

Programmable ADC IP with Cadence PDK support, featuring behavioral models, comprehensive testbenches, and automated verification flows for mixed-signal design.